Renesas Electronics has developed three system-on-chip (SoC) technologies for automotive multidomain electronic control units (ECUs) featuring advanced AI processing capabilities and chiplet functions. These were presented at the International Solid-State Circuits Conference 2026. In software-defined vehicles (SDVs), automotive SoCs need to handle multiple applications simultaneously and ensure automotive-grade quality while controlling power consumption and safety.

Renesas introduced a proprietary chiplet architecture supporting functional safety requirements specific to automotive SoCs, achieving Freedom from Interference (FFI) even in complex configurations. By enhancing the standard die-to-die UCIe interface with its RegionID mechanism, it offers safe access control through the memory management unit (MMU) and real-time cores. This architecture supports ASIL-D functional safety standards and offers high transmission speeds, providing scalability and safety for high-performance automotive SoCs.

For advanced AI processing and maintaining automotive-grade quality, Renesas has developed a 3-nm SoC design that improves neural processing unit (NPU) performance. It has redesigned the clock architecture, integrating test circuits to achieve zero-defect quality expectations even in large-scale SoCs. This ensures the high reliability required for next-generation SDVs.

To improve power efficiency and safety, Renesas has implemented advanced power control and monitoring technology using over 90 power domains. It has developed power-gating technology using ring and row power switches to reduce IR drops by approximately 13%. The dual-core lock-step configuration is utilized to detect failures, while a digital voltage meter enhances voltage monitoring.

These new technologies are incorporated into Renesas' R-Car X5H SoC for automotive multidomain ECUs, facilitating the development of SDVs with enhanced safety and enabling advanced features such as autonomous driving and digital cockpits.

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